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Stefan Abi-Karam

@stefanabikaram.com
478 followers 2.8K following 66 posts

Graduate Student (@SharcLab) + Research Faculty at @GeorgiaTech 🐝 Working on digital hardware design + AI stefanabikaram.com

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Reposted by Stefan Abi-Karam
YosysHQ @yosyshq.com · 29/09/2025
Our next #YUG will be with Matt Young, talking about triple modular redundancy. Join us at 18:00 CET / 22:30 IST / 09:00 PT on Thursday 9th October. Sign up to our mailing list to get a reminder before the event: blog.yosyshq.com/newsletter/
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Satnam Singh @satnam6502.bsky.social · 29/09/2025
I will work on exploring applications of Aristotle to the formal verification of hardware. This job is a perfect intersection of hardware design and verification, functional programming, formal methods and machine learning, bringing together several threads of my career so far.
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Stefan Abi-Karam @stefanabikaram.com · 29/09/2025
"High-Level Synthesis Synthesis" stefanabikaram.com/writing/hls-... Some fun writing on hardware design pedantry
stefanabikaram.com
Stefan Abi-Karam
Personal webiste for Stefan Abi-Karam.
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Philip Zucker @sandmouth.bsky.social · 28/09/2025
[New Blog Post] Proving the Infinitude of Primes in Knuckledragger #python #logic www.philipzucker.com/knuckle_prim...
philipzucker.com
Proving the Infinitude of Primes in Knuckledragger
Cody challenged me to prove that there are an infinitely many primes in Knuckledragger, saying it’s the minimum thing to do to demonstrate you have a proof assistant. https://en.wikipedia.org/wiki/Euc...
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Catherine @whitequark.org · 15/09/2025
i built a pages server for Codeberg that's way cheaper to operate than the existing one, please enjoy grebedoc.dev/
grebedoc.dev
Grbrmlnd
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TheZoq2 @thezoq2.bsky.social · 20/09/2025
I got inspired at orconf, so now play.spade-lang.org supports a full in-browser flow for submitting to tinytapeout.com/ Still experimental, so if you try it and run into any issues, let me know :)
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Satnam Singh @satnam6502.bsky.social · 22/09/2025
A lovely Xilinx 7-series FPGA chip layout of a sorting network produced from a dependently typed DSL in Haskell. More stuff like this during my keynote talk at ICFP 2025 in October in Singapore. icfp25.sigplan.org/details/icfp...
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Satnam Singh @satnam6502.bsky.social · 24/09/2025
I did some more hacking to produce a totally floorplanned 64-input sorter circuit on a Xilinx XC7A200T FPGA, on the LHS picture shown as a tight rectangular block, on the RHS a close-up that shows the butterfly wiring pattern.
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Jan Gray @jangray.bsky.social · 16/09/2025
Check out the fantastic open source hardware hacker content from this weekend’s ORCONF’25! fossi-foundation.org/orconf/2025?... HT/thanks @mattvenn.net
fossi-foundation.org
ORConf 2025: September 12-14, 2025 in Valencia, Spain
The ORConf conference is a weekend of presentations and networking dedicated to free and open source silicon. It's an event for the open source semiconductor community, and is run by volunteers from t...
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Stefan Abi-Karam @stefanabikaram.com · 08/09/2025
Shout out to all the CGRA folks, all jokes are in good fun
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Gabe Gomes @gabegomes.bsky.social · 06/09/2025
new preprint, tl;dr: • LLMs match or exceed SOTA strategies on chemical reaction optimizations. • we built the Iron Mind platform and we hope that it can serve as a new benchmark for both reaction optimizers and foundation models. a thread [1/5]
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Rachit Nigam @notypes.bsky.social · 06/12/2024
Lindsey Kuper's* group has produced this fantastic zine on choreographic programming that folks should definitely check out: decomposition.al/blog/2024/12... (* can't seem to find Lindsey here but please tag if you know the handle)
decomposition.al
“Communicating Chorrectly with a Choreography” is out!
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afd-icl.bsky.social @afd-icl.bsky.social · 02/04/2025
Today at ASPLOS Chengsong Tan will present our work with @wicko3.bsky.social on mechanical formalisation of CXL.cache - check out the paper! www.doc.ic.ac.uk/~afd/papers/... #CXL
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Sung Kim @sungkim.bsky.social · 04/09/2025
This study of deep learning optimizers found that previously claimed speedups of alternative optimizers over AdamW in language model pretraining were often inflated due to methodological shortcomings like unequal hyperparameter tuning and limited evaluation.
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Sung Kim @sungkim.bsky.social · 04/09/2025
Benchmarking the variety of different proposed LLM optimizers: Muon, AdEMAMix, ... all in the same setting, tuned, with varying model size, batch size, and training duration! They find that AdEMAMix is SOTA, the importance of weight decay, or how Muon “prefers” WSD, and more...
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Sung Kim @sungkim.bsky.social · 04/09/2025
Paper: Benchmarking Optimizers for Large Language Model Pretraining ( arxiv.org/abs/2509.01440 ) Repo: github.com/epfml/llm-op...
arxiv.org
Benchmarking Optimizers for Large Language Model Pretraining
The recent development of Large Language Models (LLMs) has been accompanied by an effervescence of novel ideas and methods to better optimize the loss of deep learning models. Claims from those method...
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Stefan Abi-Karam @stefanabikaram.com · 04/09/2025
I have yet to read “Computer Architecture: A Quantitative Approach”
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Lenna 💛🩸 @lenna.gay · 02/09/2025
We were cooked the moment operating system UIs stopped shipping looking like this
The internal operating system of the Fujitsu FM TOWNS computer. A few windows are open; one shows the disk drives and one shows the contents of the physical CD-ROM inserted into it.
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Altmetric @altmetric.com · 02/09/2025
Sheffield researchers doing The Lord’s work. Great study. www.nature.com/articles/d41...
nature.com
Research posts on Bluesky are more original — and get better engagement
Bluesky posts about science garner more likes and reposts than similar ones on X.
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Flux @willflux.bsky.social · 01/09/2025
Over the weekend I released the next part of Isle #FPGA Computer covering bitmap graphics. projectf.io/isle/bitmap-... I've added more docs and tests, but I'm still finding the right approach to the Isle blog and working on diagrams.
Lakritz FPGA dev board driving widescreen monitor showing picture of purple and white crocuses. The monitor is running at 1366x768.
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TheZoq2 @thezoq2.bsky.social · 31/08/2025
This Friday I successfully defended my PhD 🎉 If you want to watch a recording of the defense there is a recording here vimeo.com/1114208379/89dcd4f302
vimeo.com
Improved Tooling for Digital Hardware Development - Frans Skarman
This is "Improved Tooling for Digital Hardware Development - Frans Skarman" by Linköping University on Vimeo, the home for high quality videos and…
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Jan Gray @jangray.bsky.social · 09/04/2025
Then and now, Prof. Cong and students trailblaze new design automation research for mainstream high level synthesis tools and myriad applications. Chuck Thacker made beautiful computers with FPGAs, so this award seems particularly apt. web.mit.edu/6.173/www/cu... www.cl.cam.ac.uk/~swm11/examp...
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jrenau.bsky.social @jrenau.bsky.social · 06/12/2024
arxiv 📄 Evaluating Large Language Models for Automatic Register Transfer Logic Generation via High-Level Synthesis arxiv.org/abs/2408.02793v1 The ever-growing popularity of large language models (LLMs) has resulted in their increasing adoption for hardware design and verification. Prio...
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arXiv cs.AR Hardware Architecture @csar-bot.bsky.social · 08/07/2025
Zedong Peng, Zeju Li, Mingzhe Gao, Qiang Xu, Chen Zhang, Jieru Zhao: ForgeHLS: A Large-Scale, Open-Source Dataset for High-Level Synthesis arxiv.org/abs/2507.03255 arxiv.org/pdf/2507.03255 arxiv.org/html/2507.03255
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John Wickerson @wicko3.bsky.social · 19/04/2024
Huge congrats to Yann Herklotz (@ymherklotz) for successfully defending his PhD thesis today, all about his proven-in-Coq high-level synthesis tool. And enormous thanks to George Constantinides (@gconstantinides) and Xavier Leroy for their thoughtful and thorough examining.
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John Wickerson @wicko3.bsky.social · 07/05/2021
Here is a short blog post about an #FCCM2021 paper that will be presented next week by @ymherklotz about our work (with Zewei Du and @nadeshr5) on finding bugs in high-level synthesis tools using #fuzzing. johnwickerson.wordpress.com/2021/05…
johnwickerson.wordpress.com
Fuzzing High-Level Synthesis Tools
High-level synthesis – the automatic compilation of a sof...
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arXiv cs.AR Hardware Architecture @csar-bot.bsky.social · 01/04/2025
Martin Langhammer, George A. Constantinides: Banked Memories for Soft SIMT Processors arxiv.org/abs/2503.24132 arxiv.org/pdf/2503.24132 arxiv.org/html/2503.24132
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Keenan Crane @keenancrane.bsky.social · 29/08/2025
I can't* fathom why the top picture, and not the bottom picture, is the standard diagram for an autoencoder. The whole idea of an autoencoder is that you complete a round trip and seek cycle consistency—why lay out the network linearly?
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Sung Kim @sungkim.bsky.social · 30/08/2025
"On the Theoretical Limitations of Embedding-based Retrieval" Paper: arxiv.org/abs/2508.21038 Repo: github.com/google-deepm...
github.com
GitHub - google-deepmind/limit: On the Theoretical Limitations of Embedding-Based Retrieval
On the Theoretical Limitations of Embedding-Based Retrieval - google-deepmind/limit
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arXiv cs.AR Hardware Architecture @csar-bot.bsky.social · 28/08/2025
Rishov Sarkar, Cong Hao: OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs arxiv.org/abs/2508.19299 arxiv.org/pdf/2508.19299 arxiv.org/html/2508.19299
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George A. Constantinides @gconstantinides.bsky.social · 28/08/2025
NeuraLUT-Assemble open-sourced! My PhD @martaandronic.bsky.social has been working hard to open-source our SOTA NeuraLUT-Assemble work presented this year at FCCM2025. Extreme low latency inference for FPGA-based machine learning. Try: github.com/MartaAndroni... Read: arxiv.org/abs/2504.00592
github.com
GitHub - MartaAndronic/NeuraLUT: NeuraLUT-Assemble
NeuraLUT-Assemble. Contribute to MartaAndronic/NeuraLUT development by creating an account on GitHub.
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George A. Constantinides @gconstantinides.bsky.social · 28/08/2025
Want to see NeuraLUT-Assemble working and learn all about the latest in LUT-based neural networks and how to classify in nanoseconds? On Monday 1st @martaandronic.bsky.social and Olly Cassidy from @imperialeee.bsky.social will be delivering a tutorial at @ethz.ch ! indico.cern.ch/event/149667...
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Jan Gray @jangray.bsky.social · 27/08/2025
Congratulations @clairexen.bsky.social: #HotChips / IEEE TCMM 2025 Open Source Hardware Contribution Award
Slide from Hot Chips 2025:
"2025 TCMM Open Source Hardware Contribution Award:
Claire Wolf: In recognition of outstanding contributions to RISC-V —
including BitManip, RVFI, and PicoRV32—and to open-source tools like Yosys and IceStorm. [IEEE Computer Society TCMM / Technical Community on Microprocessors and Microcomputers]"
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Philip Zucker @sandmouth.bsky.social · 26/08/2025
[New Blog Post] Compositional Datalog on SQL: Relational Algebra of the Environment #datalog #database #sql www.philipzucker.com/compose_data...
philipzucker.com
Compositional Datalog on SQL: Relational Algebra of the Environment
I spent sone time making Datalogs that translated into SQL. https://www.philipzucker.com/tiny-sqlite-datalog/
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Guilherme @noghartt.dev · 12/09/2024
📌 New bookmark! What’s in an e-graph? | Max Bernstein This post follows from several conversations with CF Bolz-Tereick, Philip Zucker, Chris Fallin, and Max Willsey. bernsteinbear.com/blog/whats-in-an-…
bernsteinbear.com
What’s in an e-graph? | Max Bernstein
This post follows from several conversations with CF Bolz-Tereick, Philip Zucker, Chris Fallin, and Max Willsey.
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Mark Riedl @markriedl.bsky.social · 25/08/2025
Our work on Detecting Suspense in Stories will appear at COLM'25 arxiv.org/abs/2508.15794 Do LLMs know when stories are suspenseful? We ran LLMs through a bunch of classical psychology suspense studies The answer: kinda, sorta? Honestly, better than I expected. But the results are nuanced... 1/
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Mark Riedl @markriedl.bsky.social · 25/08/2025
Suspense is also really common in stories: romcom, thriller, horror, sci-fi, etc. If we ever want really good AI writing assistants, we need to understand their limitations. Also, we know that LLMs are particularly bad at GENERATING suspenseful stories arxiv.org/abs/2402.17119 without help. 7/
arxiv.org
Creating Suspenseful Stories: Iterative Planning with Large Language Models
Automated story generation has been one of the long-standing challenges in NLP. Among all dimensions of stories, suspense is very common in human-written stories but relatively under-explored in AI-ge...
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Underfox @underfox3.bsky.social · 26/08/2025
In this paper is presented RIROS, a parallel RTL fault simulation framework which integrates structural-level and fault-level parallelism approaches to minimize bubbles that arise from parallel core load imbalances. arxiv.org/pdf/2508.16376
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YosysHQ @yosyshq.com · 25/08/2025
In our latest guest blog post, Matt Young introduces an Automated Triple Modular Redundancy EDA Flow for Yosys! blog.yosyshq.com/p/tamara-tow...
blog.yosyshq.com
TaMaRa: Towards a Triple Modular Redundancy Pass for Yosys
This is a guest blog post by Matt Young\n# Foreword Although I’m a computer scientist by education, I’ve always been interested in space since I was a kid. For a long time, I had simply forgotten abou...
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angela zhou @angelamczhou.bsky.social · 25/08/2025
one thing that I don't get about the new push for RL envs for AI agents is, I feel like there was a lot of genuine joy around RL envs for atari, games, starcraft, overcooked* etc I'm not sure who out there is hankering to create RL envs for accounting, excel, IB monkey (said affectionately)
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Stefan Abi-Karam @stefanabikaram.com · 25/08/2025
I love how all high-level synthesis tools are not only cursed, but also cursed in their own quirky and unique way
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Jørgen Lund @jaalu.bsky.social · 19/08/2025
Fun breakdown of the process of implementing a toy TPU in Verilog, starting "from scratch" www.tinytpu.com
tinytpu.com
Tiny TPU
An attempt to understand and build a TPU—by complete novices.
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아리다 남편 @parkbot.bsky.social · 24/08/2025
I love this post by Todd Austin equating running a kitchen to a modern out of order microprocessor, especially with the inclusion of precise interrupts, prefetch, and power gating.
Todd Austin • • 1st
S. Jack Hu Collegiate Professor of CSE at UofM...

I am a COMPUTER ARCHITECT, which means I design computers. I was trained at a great school (UW-Madison), and I worked in industry (Intel) before I became a professor (University of Michigan). Despite these rarefied experiences, I first came to know computer architecture in the KITCHEN, working for 4 years first as a COOK. Let me explain.
As a cook, you are the control logic of a complex multi-issue machine, which operates with many of the optimizations found in today's CPUs:
IN-ORDER FETCH: The meal orders come in-order from the wait staff, and this order must be preserved.
OUT-OF-ORDER ISSUE: With a big menu, the latency to cook items will vary greatly, from fast salads to medium-latency burgers to long-latency steaks. Cooks will scan the upcoming orders and "issue" long latency items first, medium later, and short last, to make sure all items finish at roughly the same time.IN-ORDER RETIREMENT: Importantly, the meal orders have to finish IN-ORDER. Wait staff will get very annoyed if any out-of-order completion occurs—no one wants to see the table that sat down after them get their food first! BTW, Tapas restaurants break this rule, which greatly improves the efficiency of their kitchens. What is the computer architecture dual to the tapas restaurant?
PREFETCH: Occasionally, someone from the wait staff will run into the kitchen and yell "BUS!" (typically with the same vigor as someone running into a beach bar and yelling "TSUNAMI!"), which means 50+ additional orders are coming to your line.
When this happens, you turn on all the stoves and steak burners and start frying staples, etc.CACHING and SPECULATION: Many of the "specials" for the night are pre-cooked and kept in an oven (cache). This is optimizing the common case, since these popular meals take seconds to make. Often, if there are specials left over at the end of the night (mispeculation), they are donated to local food shelters.
NON-DETERMINISTIC LATENCY: Efficient architectures try to avoid all non-deterministic latencies, since they stymie schedulers and gum up the works. Kitchens operate the same way: everything is prepped to give deterministic cook times.
Once, I put a steak on a grill shared with the short-order cook window. Later, when I checked on my steak, it was gone... I confronted the short-order cook, and he said, "Do you want to fight me for it?" A non-deterministic latency made my line a mess that night!PRECISE INTERRUPTS: When the shift changes, the incoming cook will negotiate which order to transition on. The working cook will finish all their orders, after which the new cook takes over. This is called a precise interrupt, and it is similar to how out-of-order processors effectuate a process switch.
POWER GATING: Kitchens are HOT. If stoves are not needed, they are powered down!
Besides architecture training, working as a cook is a great way to start a career. All later jobs you will have will be MUCH EASIER and LESS DANGEROUS!
#computerarchitecture
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SMBC Comics @smbccomics.bsky.social · 23/08/2025
The Stewart's Calculus movie was 4,000 hours long but it's okay because nobody ever gets to the final third anyway. COMIC ◆ www.smbc-comics.com/comic/flux PATREON ◆ www.patreon.com/c/ZachWeiner... STORE ◆ smbc-store.myshopify.com
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Sung Kim @sungkim.bsky.social · 23/08/2025
Hong Kong University updated AI-Researcher: Agentic Scientific Discovery with a new technical report. GitHub: github.com/HKUDS/AI-Res... Paper: arxiv.org/abs/2505.18705
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Sung Kim @sungkim.bsky.social · 23/08/2025
Paper: arxiv.org/abs/2508.15260 Project: jiaweizzhao.github.io/deepconf
jiaweizzhao.github.io
Deep Think with Confidence
Deep Think with Confidence (DeepConf): A simple yet powerful method that significantly improves both reasoning efficiency and performance at test time by leveraging model-internal confidence signals.
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Egor Kotov 🌐🏃‍♂️🚊🚋🚙 @ekotov.pro · 23/08/2025
Many of you already heard about this new algo that's faster than Dijkstra ( arxiv.org/abs/2504.17033 ), here I collected 3 software implementations: 1. #python github.com/sidharthpuna... 2. #rust github.com/alphastrata/... 3. #rust + some explanations of the paper medium.com/%40adnanmaso...
medium.com
Breaking the Sorting Barrier: Why a New Shortest‑Path Algorithm Matters (Even If You Still Love…
A Deterministic O(m·log^(2/3) n) Breakthrough in Directed Single-Source Shortest Paths — Escaping the Sorting Barrier with Bounded…
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arxiv cs.CL @arxiv-cs-cl.bsky.social · 19/08/2025
David Heineman, Valentin Hofmann, Ian Magnusson, Yuling Gu, Noah A. Smith, Hannaneh Hajishirzi, Kyle Lo, Jesse Dodge Signal and Noise: A Framework for Reducing Uncertainty in Language Model Evaluation arxiv.org/abs/2508.13144
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Philip Zucker @sandmouth.bsky.social · 18/08/2025
[New Blog Post] A Python CLI for Verifying Assembly #formalmethods #assembly #compilers www.philipzucker.com/asm_verify3/
philipzucker.com
A Python CLI for Verifying Assembly
I’ve been building a system that verifies assembly programs via symbolic execution. I think the following are the most novel points of my approach:
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Mark Riedl @markriedl.bsky.social · 16/08/2025
Approximately 30% of answers in the so-called “Humanity’s Last Exam” could be wrong www.futurehouse.org/research-ann...
futurehouse.org
About 30% of Humanity’s Last Exam chemistry/biology answers are likely wrong | FutureHouse
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