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Flux

@willflux.bsky.social
343 followers 177 following 396 posts

Only hardware makes it possible! FPGA, RISC-V, 68K, OS, graphics, demos, permacomputing projectf.io | systemtalk.org

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Reposted by Flux
Lynn™ @lynn.cat · 21/09/2026
demos in the 1990s: chrome sphere on chessboard demos in the 2020s: chrome sphere in dimly lit room
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Flux @willflux.bsky.social · 22/09/2026
Fascinated Wikipedia clicking always leads to knowledge. Whether this is worthwhile knowledge is left as an exercise for the reader. “At one stage in 1981, three of the top ten best selling books in the US were books on solving Rubik's Cube...”
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Flux @willflux.bsky.social · 13/09/2026
Can you help? #FPGA I'd like to collect some Isle.Computer Verilator simulation performance from a range of systems. Please run the Verilator simulation of the Isle ch07 design, setting conf.bench_frames = 100; in main_ch07.cpp. Thank you. ☺️ See github.com/projf/isle/t... for instructions.
github.com
isle/boards/verilator at main · projf/isle
Isle FPGA Computer. Contribute to projf/isle development by creating an account on GitHub.
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Flux @willflux.bsky.social · 12/09/2026
New draft 🏝️ Isle.Computer blog post: projectf.io/isle/graphic... “This post is a tale of two devices: Display and Earthrise. These graphic devices make the graphics CPU programmable for the first time.“ #FPGA
ULX3S dev board driving computer display showing randomly positioned concentric blue circles.
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Flux @willflux.bsky.social · 10/09/2026
The open-issue emotional roller coaster. 🎢 Hooray, there's an issue for this... oh no, it's been open since 2021! Issue affects nested #qemu virtualisation with #FreeBSD: gitlab.com/qemu-project...
gitlab.com
QEMU emulator version 6.0.50 Failure with nested FreeBSD bhyve (#337) · Issues · QEMU / QEMU · GitLab
BUG: Starting FreeBSD Layer 2 bhyve Guest within Layer 1 FreeBSD VM Host on Layer 0 Ubuntu 21.04 KVM / QEMU Host results in Layer 1...
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Flux @willflux.bsky.social · 10/09/2026
I've been attempting to speed up my 🏝️ Isle.Computer #Verilator sim with profiling. I've added some brief notes on how I profiled on Linux: github.com/projf/isle/b... #FPGA
github.com
isle/boards/verilator/profiling.md at main · projf/isle
Isle FPGA Computer. Contribute to projf/isle development by creating an account on GitHub.
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Reposted by Flux
Ian Hanschen @furan.bsky.social · 08/09/2026
One FPGA video card. Two monitors. Total debugger supremacy.
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Flux @willflux.bsky.social · 04/09/2026
Verilog hates you. If reg [7:0] wptr; and wptr=255 these expressions are completely different: wptr + 1 == 0 wptr + 1'b1 == 0 I blogged about this yet it still caught me out: "Verilog uses the width of the widest operand when evaluating an expression". The width of 1 is 32 bits because #Verilog.
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Flux @willflux.bsky.social · 02/09/2026
Just spotted a new release of cocotb: docs.cocotb.org/en/v2.1.0/re... A long list of changes to get my head around. Not sure of the implications yet. I wonder if my existing 2.0 tests will run OK? Nice that Python 3.14 is now supported. #verilog #fpga
docs.cocotb.org
Release Notes — cocotb 2.1.0 documentation
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Flux @willflux.bsky.social · 17/08/2026
Looking forward to seeing Arcadia on the stage for the first time.
Script of Arcadia by Tom Stoppard
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Reposted by Flux
Met Office - weather and climate @metoffice.gov.uk · 13/08/2026
Temperatures provisionally reached 38.1°C at Kew Gardens, making it the hottest day of the year so far. This is the second time this year we have reached 38°C. The only other time this has happened twice in one year was in 2022. It also makes it the 5th hottest day on record.
A map showing 38.1°C recorded at Kew Gardens. This makes it the hottest day of the year so far.
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Flux @willflux.bsky.social · 12/08/2026
There's a solar #eclipse today. A good excuse to watch Eon by TBL (feel those goosebumps at Revision): youtu.be/zwoyfH7TgEQ?... #amiga #demoscene
youtu.be
Revision 2019 - Compo - Amiga Demo
YouTube video by Revision Demoparty
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Reposted by Flux
Met Office - weather and climate @metoffice.gov.uk · 08/08/2026
The UK will experience a partial solar eclipse on Wednesday 12 August. The extent of the Sun's coverage and the timing of maximum obscuration will differ across the country. Never look directly at the sun; use a pinhole projector or certified eclipse glasses to view it.
Map on UK showing how much of the sun will be obscured by the moon, at maximum, during the solar eclipse on Wednesday 12th of August. this ranges from 88% in the east to 98% in the southwest.
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Flux @willflux.bsky.social · 03/08/2026
Hastings weather station recorded 1.2 mm of rain for the month of July.
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Flux @willflux.bsky.social · 01/08/2026
I've just realised it's one year since I first wrote about 🏝️ Isle.Computer. I believe the case for simple, open hardware is as compelling as ever. I look forward to releasing the next chapter this month. ☺️ #FPGA #OpenHardware projectf.io/isle/fpga-co...
projectf.io
Isle FPGA Computer
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Flux @willflux.bsky.social · 31/07/2026
Pleasantly surprised to find Verilog support built in to @panic.com Nova 14. Perhaps less surprisingly, it's also 10x less memory hungry than VS Code.
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Flux @willflux.bsky.social · 26/07/2026
It’s raining! 🌧️ It’s been so long, I’ve almost forgotten what rain is. Europe is very dry this summer.
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Flux @willflux.bsky.social · 19/07/2026
One courgette on the allotment managed to hide amongst the leaves.
Viking minifig riding a chunky courgette.
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Flux @willflux.bsky.social · 16/07/2026
I try to learn from past hardware, but I have to wonder what Sega were thinking with the Saturn architecture. Just look at the motherboard! I don’t envy game devs starting out with it. www.copetti.org/writings/con...
Labelled motherboard of Sega Saturn showing many processors.
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Flux @willflux.bsky.social · 10/07/2026
🏝️ Isle.Computer is my #FPGA computer from scratch. Exciting new features have been in short supply of late due to life and spending the time I have on improving existing designs/Verilog. I'm now getting back to: * Display Device * Debug Monitor * Dynamic devices with MMIO * Codeberg migration
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Flux @willflux.bsky.social · 10/07/2026
Just merged a signal renaming in 🏝️ Isle.Computer graphics Verilog modules. I only realised how horrible the old naming was when I took the time to review it properly. #FPGAFriday github.com/projf/isle/p...
github.com
Graphics Signal Renaming by WillGreen · Pull Request #48 · projf/isle
Naming is hard and as the graphics designs have evolved, the signal names have become increasing inconsistent and confusing. I was using the addr suffix for things that weren't addresses (the p...
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Flux @willflux.bsky.social · 28/06/2026
Think before you buy that dried fruit. #lego
Legos minifig standing on a bag of Dried Spanish Mini Figs.
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Flux @willflux.bsky.social · 26/06/2026
Goodbye Radio 4 on Long Wave; on air for the last time today! www.bbc.co.uk/reception/wo...
BBC Radio 4 Ident
92-95 FM & 198 LW
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Flux @willflux.bsky.social · 26/06/2026
My office aircon. 🥵
Small fan position behind a glass of cold water with condensation on it.
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Flux @willflux.bsky.social · 02/06/2026
Well, it works in simulation with one clock domain. But will 🏝️ Isle.Computer hardware registers work on real hardware with two clock domains? 🤔 #FPGA
Isle.Computer Verilator/Simulation window. The window has a very dark green background. Yellow and green text in the window reads:

Isle.Computer
Display: 672x384
Bitmap: 672x384
Text: 84×24
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Flux @willflux.bsky.social · 31/05/2026
Yikes. .io is expensive these days. But I’d be sad to retire projectf.io.
Domain renewal notice for projectf.io - $74.74 for a year.
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Reposted by Flux
psenough @psenough.bsky.social · 27/05/2026
Demoscene Report 27 May 2026 youtu.be/x2qoajlkIzA
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Flux @willflux.bsky.social · 28/05/2026
I've uncovered and fixed a bug in my graphics scaling hardware. My room temperature's down 3ºC on last night. Good times.
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Reposted by Flux
Met Office - weather and climate @metoffice.gov.uk · 25/05/2026
Temperatures at Teddington Bushy Park have hit 32.8°C, provisionally equalling the all-time May record🌡️ Temperatures will continue to rise through the afternoon, we'll be giving updates here ☀️
Map of the UK with 32.8C at Teddington bushy park
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Catherine @whitequark.org · 21/05/2026
sneak peek at Glasgow revD0 designed by Elen Eisendle / Fully Automated!
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Flux @willflux.bsky.social · 21/05/2026
AMD (Xilinx) are no longer supporting Linux in the free version of #Vivado. You need to pay at least $1200/year! www.amd.com/en/products/... This makes no sense to me. This will make it harder for people to learn and get into #FPGA. 🤔
Extract from AMD Vivado feature chart showing the $1200/$1800 version supports Windows and Linux, while the Basic (Free) version only supports Windows.
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Flux @willflux.bsky.social · 17/05/2026
How to emulate an Atari YM2149 audio chip on Amiga at litteraly 0 CPU cost: arnaud-carre.github.io/2026-05-15-y... “…pure square waves sound rather bland and certainly not epic enough to accompany a future Amiga sin-dots world record.”
arnaud-carre.github.io
Playing ATARI music on Amiga for free!
How to emulate an Atari YM2149 audio chip on Amiga at litteraly 0 CPU cost, by Arnaud Carré
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Flux @willflux.bsky.social · 14/05/2026
"The 64-bit BEAR contains the address of the last instruction that broke the sequential execution of instructions" - Why am I reading about z/Architecture? 🤔
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Flux @willflux.bsky.social · 09/05/2026
Have you upgraded your @yosyshq.com yosys recently? #FPGA 0.49 (Jan 2025): TRELLIS_COMB: 4357 0.64 (May 2026): TRELLIS_COMB: 3682 15% LUT saving with no change in my Verilog design. 👏
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Nanoraptor @nanoraptor.danamania.com · 10/05/2026
Macintosh HyperQuadra
A picture of a Macintosh HyperQuadra. It's a beige mac looking box in the Snow White design, made of eight cubes stacked into another cube. the lower left most cube has a floppy drive, apple logo, and ventilation strakes. It's in a very 90s-lit looking room with other computer equipment.
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Flux @willflux.bsky.social · 09/05/2026
Just merged 🏝️ Isle.Computer graphics refactor, fixing many small issues and general clunkiness. github.com/projf/isle/p... Working on a computer from scratch requires learning so many things in so many areas, from FPGA fanout, to Unicode, RISC-V asm, and Bresenham's line algorithm. 😅 #FPGA
github.com
Graphics Refactor 2026-05 by WillGreen · Pull Request #38 · projf/isle
Many small fixes and improvements from recent work on future Isle graphics and device designs. display_timings.v and display_modes.vh replace display.v replace hres/vres signals with params add p...
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Flux @willflux.bsky.social · 09/05/2026
Have you upgraded your @yosyshq.com yosys recently? #FPGA 0.49 (Jan 2025): TRELLIS_COMB: 4357 0.64 (May 2026): TRELLIS_COMB: 3682 15% LUT saving with no change in my Verilog design. 👏
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Flux @willflux.bsky.social · 07/05/2026
I just voted 🗳️ in the Hastings and East Sussex #elections.
A polling station at a church. There are two signs, one says The Parish Centre and the other Polling Station.
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Flux @willflux.bsky.social · 05/05/2026
The TMDS clock wasn't meeting timing on #ULX3S. There is so little logic in the clk_pix_5x domain I doubted I could do much. Then I realised each channel shared a small critical ring counter. Giving each colour channel its own added 100 MHz+ to the max frequency! #FPGA 🚀 github.com/projf/isle/b...
github.com
isle/hardware/arch/ecp5/dvi_generator.v at main · projf/isle
Isle FPGA Computer. Contribute to projf/isle development by creating an account on GitHub.
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Reposted by Flux
TinyTapeout @tinytapeout.com · 05/05/2026
Want to get your hands on a real lithography photomask? How about some silicon wafers? Enter our demoscene competition for a chance to win one! tinytapeout.com/competitions... Last 6 days to get involved! #demoscene #opensource #ASIC
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Flux @willflux.bsky.social · 02/05/2026
Made some time for 🏝️ Isle.Computer today. Getting the graphics registers working across clock domains so the CPU can double buffer, scroll, adjust transparency etc. #FPGA Images show RISC-V CPU reading graphics registers in sim and on #ULX3S.
Verilator/SDL simulation window running Isle on macOS. The window has a dark green background with the following text:

Isle.Computer
Display: 672x384
Bitmap: 672×384
Text: 84×24ULX3S FPGA dev board (green PCB with chips) connected to monitor. The screen background is dark green with the following text:

Isle.Computer
Display: 1366x768
Bitmap: 672×384
Text: 84×24
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Flux @willflux.bsky.social · 29/04/2026
Just when you thought GPU pricing had lost the ability to shock. A mobile 5070 for £1150! 😮
RTX 5070 12 gigabyte graphics module for Framework 16. Price £1150 inc VAT. $1200 in US.
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Flux @willflux.bsky.social · 26/04/2026
French bram is on another level. #fpga
French bram is on another level. #fpga
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Flux @willflux.bsky.social · 16/04/2026
Sometimes the wrong palette turns out right.
16 colour image of crocuses in grass with the wrong palette. The flowers are green and blue while the grass is bright pink, purple, and sand coloured.
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Flux @willflux.bsky.social · 11/04/2026
Verilog error message of the day: "Illegal character in binary constant: 2". Yes, I'm appalled at myself too.
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Minas Karamanis @minaskar.bsky.social · 30/03/2026
Hey, I wrote a thing about AI in astrophysics ergosphere.blog/posts/the-ma...
ergosphere.blog
The machines are fine. I'm worried about us.
On AI agents, grunt work, and the part of science that isn't replaceable.
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TinyTapeout @tinytapeout.com · 27/03/2026
Announcing the second Tiny Tapeout demoscene competition! Free silicon space for all entrants! tinytapeout.com/competitions...
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Flux @willflux.bsky.social · 29/03/2026
Adding an enable signal to 🏝️ Isle.Computer drawing engine was more of a pain than I expected, but we're now ready to share vram access with the CPU. On the plus side, this also allows you to slow the action down so you can see the drawing happen. #FPGA #verilog
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Flux @willflux.bsky.social · 27/03/2026
I'm considering moving my git repos to #Codeberg (from GitHub). If you have open source projects on Codeberg, I'd be interested to learn from your experience. I host my own web sites, so it's only the core git stuff I need to worry about. 🙏
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Flux @willflux.bsky.social · 20/03/2026
Sometimes you need to ship it and call it a night, so I give you 🏝️ Isle.Computer Chapter 6 - Input Output: projectf.io/isle/input-o... Adds input hardware, uart, Isle edition of FemtoRV "Gracilis" RV32IMC CPU, software library in #riscv asm, Verilator/SDL sim improvements... #FPGA
Isle.Computer running on ULX3S FPGA dev board connected to monitor showing number guessing game.
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