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Falvyu

@falvyu.bsky.social
30 followers 52 following 51 posts

PhD | French | Hardware-aware Algorithm design | Image Processing | HPC SIMD-friends: #SSE, #AVX512, #NEON, #RVV (Opinions are my own)

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Reposted by Falvyu
Tom Forsyth @tomforsyth.bsky.social · 21/11/2025
Recent discussion about the perils of doors in gamedev reminded me of a bug caused by a door in a game you may have heard of called "Half Life 2". I wrote it up over on Mastodon (I find it's better at long threads): mastodon.gamedev.place/@TomF/115589...
mastodon.gamedev.place
Tom Forsyth (@TomF@mastodon.gamedev.place)
Attached: 1 image Recent discussion about the perils of doors in gamedev reminded me of a bug caused by a door in a game you may heard of called "Half Life 2". Are you sitting comfortably? Then I sha...
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camel-cdr.bsky.social @camel-cdr.bsky.social · 25/09/2025
Tenstorrent decided to publish the first benchmark data for Ascalon's RVV implementation using the instruction throughput benchmark of my rvv-bench benchmark suite. <3 camel-cdr.github.io/rvv-bench-re... Overall, the results look really good so far:
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Falvyu @falvyu.bsky.social · 02/07/2025
You can probably find this on consumer-grade products too (e.g. smartphones). But the issue is finding how to 'access' these settings.
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Falvyu @falvyu.bsky.social · 02/07/2025
Yes absolutely. Some astronomy sensors do support it internally: the Sony IMX571, IMX533, and IMX294 (among others) do support binning. But these models are mainly for astrophotography and industrial-grade products.
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Falvyu @falvyu.bsky.social · 14/06/2025
If a pixel is saturated, then you can't recover the data. That's a big issue in bright areas (e.g stars, Andromeda/Orion nebula cores, ...), and that's why people stack pictures.
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Falvyu @falvyu.bsky.social · 14/06/2025
It's also the reason why temperature made such a difference (and why people use cooled cameras for astrophotography): it doubles every 3 degrees C. But what really limits sub-exposure time is astrophotography is the histogram (+ mount/atmosphere stability + satellite/plane trails + sky glow).
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Falvyu @falvyu.bsky.social · 14/06/2025
Lower shutter speed contains more 'dark current' noise, but that's just because dark current is proportional to exposure time, but so is the main signal: The signal-to-noise ratio remains the same. Taking multiple exposures does not help with it (other than making dark flat more convenient).
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InstLatX64 @instlatx64.bsky.social · 17/05/2025
The most underutilized #AVX512 instruction, VPSHUFBITQMB, is actually very useful for compactly generating a mask with arbitrary criteria based on b[5:0], e.g. to select special characters for parsing: if the second operand is a broadcasted 64-bit vector, where the ones represent the searched values
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Underfox @underfox3.bsky.social · 15/04/2025
Intel researchers have proposed Earth, an efficient architecture for RISC-V vector memory access patterns, enabling coalesced strided instruction memory access and buffer-free segment instruction processing. arxiv.org/pdf/2504.08334
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HGPU group @hgpu.bsky.social · 30/03/2025
Analyzing Modern NVIDIA GPU cores #HardwareArchitecture hgpu.org?p=29837
hgpu.org
Analyzing Modern NVIDIA GPU cores
GPUs are the most popular platform for accelerating HPC workloads, such as artificial intelligence and science simulations. However, most microarchitectural research in academia relies on GPU core …
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Tom Forsyth @tomforsyth.bsky.social · 29/03/2025
Oh shit. I just realised no - it really is. I thought I was joking. This is going to require a long and complex backstory. Sorry absolutely not sorry it'll be funny maybe but also you'll learn something.
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FCLC (being a silly goose) @fclc.bsky.social · 27/03/2025
Hey Folks! cool little FOSS community tool released for simulating the way @tenstorrent.bsky.social Hardware works! Namely the way the tensix instruction stream operates: github.com/tenstorrent/...
github.com
GitHub - tenstorrent/tensix-isa-simulator
Contribute to tenstorrent/tensix-isa-simulator development by creating an account on GitHub.
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Raph Levien @raphlinus.bsky.social · 21/03/2025
I've now published my blog post, "I want a good parallel computer." raphlinus.github.io/gpu/2025/03/... . Thanks much to all the feedback on the draft, I'd like to think I've clarified some things that might have been confusing.
raphlinus.github.io
I want a good parallel computer
The GPU in your computer is about 10 to 100 times more powerful than the CPU, depending on workload. For real-time graphics rendering and machine learning, you are enjoying that power, and doing those...
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InstLatX64 @instlatx64.bsky.social · 19/03/2025
Another round of #Intel ISA defragmentation: Finally, #AVX10_2 is a common ISA for all CPU segments!
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Phoronix @phoronix-poster.bsky.social · 19/03/2025
Intel AVX10 Drops Optional 512-bit: No AVX10 256-bit Only E-Cores In The Future - www.phoronix.com/news/Intel-AVX10-D…
phoronix.com
Intel AVX10 Drops Optional 512-bit: No AVX10 256-bit Only E-Cores In The Future
Intel updated their AVX10 whitepaper and associated open-source compiler patches around this next Advanced Vector Extensions standard... While AVX10 had intended to allow either 256-bit or 612-bit modes depending upon processor capabilities, Intel has dropped the 256-bit-only approach and going for 512-bit everywhere. Thus it would seem to indicate that Intel E cores of the future will properly support AVX 512-bit operation!..
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NSF–DOE Rubin Observatory @rubinobservatory.org · 12/03/2025
Lights, camera, action! The world's largest digital camera has been installed at NSF–DOE Rubin Observatory! 🤩 The LSST Camera was the final major component of the observatory. With it in place, Rubin officially enters its final phase of testing!🔭 🔗: rubinobservatory.org/news/lsst-camera-installed
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FCLC (being a silly goose) @fclc.bsky.social · 24/02/2025
"All lessons in tech will be relearned every 25 years" -Me, looking at us relearning the same thing again
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Björkus "No time_t to Die" Dorkus @thephd.dev · 07/02/2025
I gotta see so many posts saying "Rust is slower" and like I think these people just evaluate languages and designs based on vibes and not based on like the material output from the compilers.
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Jonathan O'Callaghan @astrojonny.bsky.social · 04/02/2025
The chance of asteroid 2024 YR4 hitting out planet in 2032 is now 1.5%, or 1 in 67. The OVERWHELMING likelihood is that the asteroid will miss Earth. But for the first time ever, we might have to seriously consider a deflection mission soon. Let me explain. 🧵 (1/x)
media.tenor.com
a picture of the earth and an asteroid with the national geographic logo
Alt: a picture of the earth and an asteroid heading towards it
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Falvyu @falvyu.bsky.social · 01/02/2025
I don't know anything about Raku, but these ads/posters are quite cool. #FOSDEM
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FCLC (being a silly goose) @fclc.bsky.social · 01/02/2025
Hey folks! Will be talking about the wonderful, wacky world of floating point Sunday afternoon in the HPC, Big data, & Data science dev room at 15:30! #fosdem
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Kenneth Hoste (boegel) @boegel.bsky.social · 01/02/2025
“Welcome to the largest open source conference on earth!” #FOSDEM
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Falvyu @falvyu.bsky.social · 31/01/2025
Hello Brussels ! #FOSDEM
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Björkus "No time_t to Die" Dorkus @thephd.dev · 24/01/2025
Mmmmmnnnn, data.... thephd.dev/the-big-arra...
thephd.dev
Results! - The Big Array Size Survey for C
Happy New Year! It is time report the results of the Array Size Operator survey and answer some comments people have been asking for!
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Phoronix @phoronix-poster.bsky.social · 21/01/2025
SDL 3 Official Release Now Available With New APIs - www.phoronix.com/news/SDL3-Official…
phoronix.com
SDL 3 Officially Released With New APIs, Better HiDPI & Improved Audio Handling
In addition to the Wine 10.0 stable release today, making the day very exciting as well for Linux gamers is the first official SDL 3.0 release!..
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Phoronix @phoronix-poster.bsky.social · 17/01/2025
Linux 6.14 To Add Support For SpacemiT's "Energy Efficient AI" RISC-V CPUs - www.phoronix.com/news/Linux-6.14-Sp…
phoronix.com
Linux 6.14 To Add Support For SpacemiT's "Energy Efficient AI" RISC-V CPUs
The upcoming Linux 6.14 kernel is poised to introduce initial support for SpacemiT platforms, the Chinese computing chip company developing "next-generation RISC-V high-performance CPUs." For this next Linux kernel release the SpaceMiT Key Stone K1 octa-core RISC-V AI CPU with SpacemiT X60 cores will see support...
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Gaia Mission @gaiamission.bsky.social · 15/01/2025
So long and thanks for all the fish! I just observed my last star this morning... #GaiaDPAC and @esa.int Gaia teams will do their best to make some great data releases from the data I gathered! #GaiaDR4 in 2026, #GaiaDR5 around the end of the decade. Keep posted for our news today at 10:00 CET.
giphy.com
rotating european space agency GIF - Find & Share on GIPHY
Discover & share this rotating european space agency GIF with everyone you know. GIPHY is how you search, share, discover, and create GIFs.
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NSF–DOE Rubin Observatory @rubinobservatory.org · 14/01/2025
When you turn it on and it works spectacularly! The Rubin team has successfully completed the first on-sky engineering tests using the 144-Mpx engineering camera. Up next: installing the largest digital camera in the world, LSST Camera! 🔭🧪 rubinobservatory.org/news/rubin-completes-comcam-tests
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Falvyu @falvyu.bsky.social · 10/01/2025
Has the author ever programmed in anything other than C ?
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八咫烏 @yatagarasu.bsky.social · 01/01/2025
today i learned x264 has a setting specifically for encoding touhou games
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Falvyu @falvyu.bsky.social · 01/01/2025
Will the talks be recorded & available online ? In any case, I wish you good luck.
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Falvyu @falvyu.bsky.social · 30/12/2024
Oh yep. Good catch. Thanks, it works perfectly.
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Falvyu @falvyu.bsky.social · 30/12/2024
Also, do you happen to know if someone has compiled a list of bitwise scans/segmented-scans ? I searched for one earlier, but did not find anything. However, I'm likely not the first to come across this problem. And I wouldn't be surprised if they are listed on some personal blog.
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Falvyu @falvyu.bsky.social · 30/12/2024
Thanks. These work like a charm and are indeed simpler than what I had found.
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efroach76.bsky.social @efroach76.bsky.social · 30/12/2024
As Harold mentions, Prefix-Or is just v | -v. Segment-scan-or can also be simplified, for example uint64_t s = (v | m) >> 1; return s ^ (s - v) (4 instructions instead of 7).
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Falvyu @falvyu.bsky.social · 29/12/2024
Note #1: in the segmented scan version, `(v[i] == 1) & (mreset[i] == 1)` => `1` (i.e. input has priority over 'reset'). Note #2: Expression can be simplified if 'input' can not happen at the same time as a 'reset'.
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Falvyu @falvyu.bsky.social · 29/12/2024
Some neat tricks for computing bit-wise prefix-or and segmented-prefix-or within scalar registers.
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Falvyu @falvyu.bsky.social · 28/12/2024
It turns that the 'unrolled loop' for the 64-bits bitwise-or segmented scan can actually be reduced down to a few instructions. (not sure if that's a known trick) Note: compilers optimize `((~mreset) | v)` so that it is only computed once.
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Falvyu @falvyu.bsky.social · 27/12/2024
(or just replicate whatever simdjson is doing)
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Falvyu @falvyu.bsky.social · 27/12/2024
PS: It only handles 8-bits ASCII (no UTF-8) For quotes (master only handles double-quotes): complexity increases quickly if you want to support single-quote & cie. Instead of doing everything at once, a RLE of quoted areas and a scalar post-processing ay be a good option.
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camel-cdr.bsky.social @camel-cdr.bsky.social · 27/12/2024
Removing single line comments in multiple lines in parallel with RVV. If anyone has a good AVX512 solution, please share. Inspired by this reddit post: www.reddit.com/r/simd/comme... #RVV #RISC-V #SIMD
/* Note: '\' is '\n' */
0123456789ABCDEFGHIJKLMNOPQRSTUVWX | vid
Line 1#  # # ## #\Line2 # #\Line 3 | v0 = input
0000001001010110110000001011000000 | m = vmor(vmseq(v0, '#'), vmseq(v0, '\n'))
000000111223345567777777889AAAAAAA | iota = vslide1down(viota(m)) /* vl-=1 */
0######\##\                        | v1 = vslide1up(vcompress(v0, m), 0)
000000###########\\\\\\\###\\\\\\\ | seg-cp-scan = vrgather(v1, iota)
0000001111111111100000001110000000 | seg-cp-scan == '#'
Line 1\Line2\Line 3                | vcompress(v0, seg-cp-scan)
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Falvyu @falvyu.bsky.social · 27/12/2024
BTW the code requires VBMI2: pre-Icelake implementations likely have to widen to 32-bits, compress, and narrow to 8-bits. I also have ideas to improve the 64-bits segmented scan: instead of doing in scalar, perform SWAR within a SIMD lane and replace 'bit-select' patterns (4 ops) with vpternlog.
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Falvyu @falvyu.bsky.social · 27/12/2024
I've taken a look at the problem: github.com/natmaurice/s... (code on master branch also handle quotes) The segmented scan is done in scalar/SWP to avoid inter-lane overheads. I've tested it, but not benchmarked it yet.
github.com
GitHub - natmaurice/simd-comment at comment-simple
Contribute to natmaurice/simd-comment development by creating an account on GitHub.
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Falvyu @falvyu.bsky.social · 26/12/2024
*screams internally*
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FCLC (being a silly goose) @fclc.bsky.social · 23/12/2024
Mini thread on developer trust for #AMD. Effectively: the default assumption for AMD is that the stack will be broken. The community tried to help, but as Dave Airlie said years ago “throwing source code over the fence doesn’t make you FOSS” #HPC #ROCm
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Falvyu @falvyu.bsky.social · 23/12/2024
Of course, revenues likely lower on desktop than on datacenter. But poor results on desktop aren't a good display for other markets. And it's a shame that AMD makes great hardware but shoots itself in the foot due to poor software support.
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Falvyu @falvyu.bsky.social · 23/12/2024
Even on the desktop CPU side, things are far from perfect: znver4 was submitted to gcc nearly 6 months after launch (vs ~1 year before launch for Intel). Zen 5 also under-performed on launch on Windows due to drivers issues (gcc support is there, so that's at least an improvement).
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halvarflake.bsky.social @halvarflake.bsky.social · 23/12/2024
Ok, reading semianalysis.com/2024/12/22/m... it seems that *most* of AMDs problems could indeed be remedied by having a team of 4-10 very strong engineers focus on always keeping default PyTorch fast on AMD hardware, with nightly regression tests.
semianalysis.com
MI300X vs H100 vs H200 Benchmark Part 1: Training – CUDA Moat Still Alive
Intro SemiAnalysis has been on a five-month long quest to settle the reality of MI300X. In theory, the MI300X should be at a huge advantage over Nvidia’s H100 and H200 in terms of specifications an…
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