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Rachit Nigam @notypes.bsky.social · 09/02/2026

Very cool stuff! Thanks for the writeup!

Rachit Nigam @notypes.bsky.social · 04/02/2026

Phew, survived the first grant submission and now onto prepping my first lecture! People weren't joking when they said you can't no-life as a prof. because you'll still have commitments tomorrow 😆

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Rachit Nigam @notypes.bsky.social · 03/02/2026

Building a "Rust for hardware design" requires the same so I spent the weekend writing a 2-page paper defining a criteria for "safe hardware description languages (HDLs)" and how they should complement, instead of competing with existing formal tools: people.csail.mit.edu/rachit/files...

Rachit Nigam @notypes.bsky.social · 03/02/2026

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A hopefully uncontroversial take is that Memory safety defines a class of *logical errors* that pointer-manipulating programs suffer from. By defining this category, we were able to create dynamic and static mechanisms to eliminate it.

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Rachit Nigam @notypes.bsky.social · 03/02/2026

People keep asking me what the "Rust for hardware design" would look like. Those who know their PL history know that, before we could build Rust, we had to define ideas like "Memory Safety".

Rachit Nigam @notypes.bsky.social · 30/01/2026

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Looks cool! Is it going to be streamed?

I'm really excited to see where this line of work goes and what we can build with it! If you're around at ASPLOS and interested in this kind of work, come say hi and go watch the talks!!

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Parameterized Hardware Design with Latency-Abstract Interfaces

1. Lilac (arxiv.org/abs/2401.02570) : Demonstrates how safe HDLs enable fundamentally new design abstractions! 2.Anvil (arxiv.org/abs/2503.19447): Explores how Filament's verification abstractions can be applied to a higher-level, message-passing HDL and enforce safety properties!

arxiv.org

Hardware designs must use latency-insensitive (LI) interfaces when timing is input-dependent. When timing is input-independent, designs should use latency-sensitive (LS) interfaces for maximum perform...

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Filament | Fearless Hardware Design

Our work on Filament (filamenthdl.com) defined a criteria for safe hardware description languages (HDLs) and showed that you can enforce it using a type system and introduce no overheads. This year's ASPLOS features two papers exploring safe HDLs:

filamenthdl.com

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Filament | Fearless Hardware Design

Hardware design needs its own safe programming model but instead of memory, the problem is time! Every hardware module reasons about how time affects itself and everything it communicates with. Getting it wrong means bugs: reading meaningless values and using resources that are unavailable.

filamenthdl.com

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Rachit Nigam @notypes.bsky.social · 20/01/2026

Hardware design should be SAFER! Memory-safe software languages changed the world and allowed to us to build massively larger systems. At their heart, memory-safe languages eliminate a category of bugs that pointer-manipulating programs suffer from.

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Folks showing up to ASPLOS: would there be interest in having a "junior faculty social"? I used to organize in-person socials for PhD students at PLDI (pltea.github.io) and think it would be fun to have an excuse to meet the cohort of junior faculty!

pltea.github.io

PLTea

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Rachit Nigam @notypes.bsky.social · 06/01/2026

The SRC is awesome! Especially good for new junior faculty as a way to meet a wide set of soon-to-be-PhD applicants and learn about all the cool research they've been doing!

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Rachit Nigam @notypes.bsky.social · 02/01/2026

Curious about some programming languages history: when/where did the idea of "Memory Safety" come from? Is there a good source that traces its development and formalization?

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Rachit Nigam @notypes.bsky.social · 02/01/2026

Continuing my long-running beef with "transpiler", I wrote a post trying to formalize different definitions of the word and why they don't work (for me): people.csail.mit.edu/rachit/post/... (Not so secret goal: Get more people to read "On the Expressive Power of Programming Languages")

Formally speaking, "Transpiler" is a useless word | Rachit Nigam

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Reposted by Rachit Nigam

Jonathan Aldrich @jonathanaldrich.bsky.social · 26/08/2025

Q: Is it OK to get the references for my paper from generative AI? A: Only if you verify they are real & relevant. Submitting a paper with hallucinated references would violate the ACM Policy on Authorship, and your paper will likely be desk rejected.

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Reposted by Rachit Nigam

Jan Gray @jangray.bsky.social · 27/08/2025

Congratulations @clairexen.bsky.social: #HotChips / IEEE TCMM 2025 Open Source Hardware Contribution Award

Slide from Hot Chips 2025:
"2025 TCMM Open Source Hardware Contribution Award:
Claire Wolf: In recognition of outstanding contributions to RISC-V —
including BitManip, RVFI, and PicoRV32—and to open-source tools like Yosys and IceStorm. [IEEE Computer Society TCMM / Technical Community on Microprocessors and Microcomputers]"

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Rachit Nigam @notypes.bsky.social · 07/07/2025

@sigplan-pldi.bsky.social was an absolute blast this year and had a lot of interesting conversations and papers! I've written down a little retrospective reflecting on some of them: people.csail.mit.edu/rachit/post/...

Reflecting on PLDI 2025 | Rachit Nigam

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Rachit Nigam @notypes.bsky.social · 01/07/2025

At PLDI this year, I received the SIGPLAN John C. Reynolds Distinguished Dissertation award and at ISCA, I received an honorable mention for the SIGARCH / TCCA Outstanding dissertation award! Truly honored to receive recognition from both the communities! Really excited for what comes next!

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Rachit Nigam @notypes.bsky.social · 06/04/2025

somehow in $CURRENT_YEAR, I still can't get OCaml's LSP to jump to the correct definition for me after hours of debugging....

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Reposted by Rachit Nigam

Jingbo Wang @jingbow.bsky.social · 28/03/2025

PLMW@PLDI'25 is now accepting applications: pldi25.sigplan.org/home/PLMW-pl... Deadline: April 10, 2025 PLMW an excellent place to learn about exciting PL research, from the ground up, and to find your PL friends! Please apply!

pldi25.sigplan.org

PLMW @ PLDI 2025 - Programming Languages Mentoring Workshop - PLDI 2025

The Programming Language Mentoring Workshop (PLMW) aims to broaden the exposure of late-stage undergraduate students and early-stage graduate students to research and career opportunities in programmi...

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Rachit Nigam @notypes.bsky.social · 28/03/2025

implicit public modules baaaaad

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Reposted by Rachit Nigam

Sam Westrick @shwestrick.bsky.social · 27/01/2025

SPAA'25 is seeking submissions! Uniquely this year, SPAA seeks a broader set of research areas, including algorithms, systems, PL, applications, quantum, and more. The central theme is parallelism and concurrency. Deadline: Feb 28 Please consider submitting! spaa.acm.org/call-for-pap...

spaa.acm.org

Call For Papers – ACM Symposium on Parallelism in Algorithms and Architectures

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Rachit Nigam @notypes.bsky.social · 27/01/2025

Well-deserved! Iris is also a really great example of how well-engineered artifacts make it dramatically easier to pursue technically deep research.

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Rachit Nigam @notypes.bsky.social · 27/01/2025

What are people's favorite "core systems" textbooks (OS, Networking, Databases, etc.)?

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Rachit Nigam @notypes.bsky.social · 24/01/2025

Which specific idea? I can think of quite a few bits of things that react has that come from academia. see ur/web, state monad, a long line of @shriram.bsky.social's work

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Rachit Nigam @notypes.bsky.social · 22/01/2025

using emacs (spacemacs) and enjoying it...i have been corrupted

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syntactically or expressivity wise (amount of code needed to express an idea)

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And again, as a testing expert you (and similarly other PL people with different verification expertise) might be well suited to do this work. Regardless, I'm broadly of the opinion that researchers should do what they want and not be pulled by things that don't excite them.

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I think the challenge is demonstrating to people that they even *should* use these systems (instead of taking the path of least resistance which is asking thr LLM to generate the tests for you)

- a majority of LLM / Agentic systems work is being done outside the community - formal reasoning with AI people have been ahead of the curve so that's one place we've been doing well

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- Bug data systems (spark, map-reduce were not PL conf papers) - ML (TVM, PyTorch published at OSDI, ASPLOS) - Cloud systems (hydro is at VLDB) - High-performance design (HW design, image processing etc. came from outside the community)

This is an interesting thread because my perspective on your work is that it's precisely the kind of thing we need to make LLM-assisted code generation better *now*. Some folks in formal methods already realize this but: when code is cheap to generate, verification becomes the primary problem

I would say the benefit of academia is the ability to take long-term bets instead of waiting for things to take their proper course. PL historically has been late to the party on many different trends; it takes 2-3 years to really get a grasp on the ideas in a new area and contribute back

Rachit Nigam @notypes.bsky.social · 19/01/2025

You can reasonably argue whether a class on C programming (or build systems, tooling, validating programs, etc.) would be useful or not but it is a materially different curricular goal from what a required, sophomore-level systems courses do (and I would argue, should do)

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Rachit Nigam @notypes.bsky.social · 19/01/2025

As @shriram.bsky.social always points out, it's more important to look at what the goals of the curriculum is instead of the specific language it uses. The goals of most these classes is to teach students systems abstractions (which might include C but touch ISA, circuits, OS abstractions) ... 1/2

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Rachit Nigam @notypes.bsky.social · 17/01/2025

Switching to OCaml really makes me appreciate how much effort Rust folks put into good error messages

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I don't think of "manufacturer prowess" (compilation is not novel-y hard, it is a lot of engineering). Mobile definitely laid the groundwork

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I don't have strong evidence to think so. For example, RISC-V has been in development for quite some time but compiler support is not super strong. Said differently: this remains a function of consumer demand and compiler engineering remains slow

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Can you say a bit more about what you mean by adapting? Like, creating new compiler backends or something?

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This is a terry pratchett sentence right here

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